A New MMC Topology Which Decreases the Sub Module Voltage Fluctuations at Lower Switching Frequencies and Improves Converter Efficiency

Modular Multi-level inverters (MMCs) are becoming more common because of their suitability for applications in smart grids and multi-terminal HVDC transmission networks. The comparative study between the two classic topologies of MMC (AC side cascaded and DC side cascaded topologies) indicates some disadvantages which can affect their performance. The sub module voltage ripple and switching losses are one of the main issues and the reason for the appearance of the circulating current is sub module capacitor voltage ripple. Hence, the sub module capacitor needs to be large enough to constrain the voltage ripple when operating at lower switching frequencies. However, this is prohibitively uneconomical for the high voltage applications. There is always a trade off in MMC design between the switching frequency and sub module voltage ripple

DC side and AC side cascaded multilevel inverter topologies: A comparative study due to variation in design features

This paper presents a comparative study between DC side and AC side cascaded topologies for the hybrid modular multilevel converter (MMC) which are becoming popular in recent years. A multilevel converter with half or full bridge sub modules connected across DC link is another alternative for high-voltage applications as it has the same number of sub modules and footprint as AC side cascaded topology with the same DC link voltage and AC side voltage. The compared AC side cascaded structure offers a two-level converter as the high voltage stage and cascaded H-bridge (which is full bridge) sub modules with electrically isolated DC sources or capacitors for the low voltage stages which has number of features suitable for HVDC application. The comparison aspects are investigated against 6 different converter sub module number and configuration options for losses, harmonic profile of the output voltage, and the DC fault current characteristics (before blocking the IGBT gate signals during the DC fault) with the same input DC voltage and the same load for both (DC and AC side) topologies. The major results and findings of this investigation are presented, compared and discussed

New grid-tied cascaded multilevel inverter topology with reduced number of switches

Performance of multilevel inverters (MLI) are distinguished because of their low harmonic waveform generation, low filtering requirements on AC side and high voltage application. Among different (MLI) topologies, cascaded multi-level inverters (CMLI) are easier to implement and are much more cost effective. The main drawback of multilevel inverters is requirement of more than one isolated DC source and a lot of switches which makes them bulky and expensive to implement. To address this issue, researchers have investigated new topologies with reduced number of switches compared to conventional multilevel converters. In this paper, a new grid-tied cascaded multi-level topology with reduced number of switches is proposed. Compared to a standard 11-level MLI, the number of switches are reduced. The objective of the design is to reduce the number of DC sources and switches in order to reach the same level of the output voltage. Finally, performance of the proposed topology with a range of modulation and load power factor, operation regarding connection to the grid with closed loop control and comparative study with the other topologies is presented

Power Loss Comparison of DC Side and AC Side Cascaded Modular Multilevel Inverters

High-voltage DC (HVDC) transmission systems based on voltage source converter technology are increasingly being used for interconnecting power networks and for transporting energy from remote renewable energy sources. Modular multilevel converters (MMCs) are emerging as the technology of choice for future HVDC transmission systems. Several MMC topologies have been introduced for high power applications and among them the AC side and the DC side cascaded topologies have received most interest because of their high efficiency, low switching losses and good modularity. In high power applications, the efficiency of the converter is an important consideration. Hence it is essential converter power loss analysis is addressed at design stage. Due to the high number of switches the various MMC topologies, the power loss calculations is particularly complex. This paper presents the analysis of the power losses in both DC side and AC side cascaded converters and compares their overall efficiency for a 500 MW power rating. The nominal values of efficiency quoted for an existing HVDC interconnector between Ireland and Wales are used to verify the methodology used for power loss calculations presented in this paper

Application of Improved Phase-Shifted Pulse Width Modulation with Third Harmonic Injection to Hybrid Modular Multi-level Converter

Hybrid modular multi-level converters (Hybrid- MMCs) which are modular multi-level converters including full and half bridge sub-modules, are recently used in high-voltage direct current (HVDC) transmission systems. Compared to its non-hybrid counterpart, these converters have several advantages such as the ability to nullify the DC side fault current and controlling AC side reactive power during the faults. This paper proposes a novel modified phase shifted PWM method (PS-PWM) which uses a combination of an improved PS-PWM with cancelled mismatch pulses and a third harmonic injection method. The proposed method not only reduces output voltage harmonic content and uneven loss distribution between sub-modules but also extends the linear operating range of the inverter, which improves the DC bus utilization. The mathematical analysis is derived for the proposed method and in order to study the efficiency of the system using proposed method, the loss calculation has been done and compared with traditional PS-PWM method. Simulation results in Matlab/Simulink depict the suitable performance of the presented scheme